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authorGravatar Bernd Kuhls <bernd.kuhls@t-online.de>2014-04-27 13:29:15 +0200
committerGravatar Peter Korsgaard <peter@korsgaard.com>2014-05-03 03:39:29 +0200
commitaffb6a38535382526333517e86ee5a31df0064fe (patch)
tree0616809bdf279298eacc9e1d769fe74f8318ba73 /arch
parent26132bac8dc4c2d3130c0d239ab4e174dd8b221c (diff)
downloadbuildroot-affb6a38535382526333517e86ee5a31df0064fe.tar.gz
buildroot-affb6a38535382526333517e86ee5a31df0064fe.tar.bz2
arch: add support for "corei7" Intel CPU optimisations
gcc support was added in version 4.6: http://gcc.gnu.org/gcc-4.6/changes.html Signed-off-by: Bernd Kuhls <bernd.kuhls@t-online.de> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/Config.in.x8612
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/Config.in.x86 b/arch/Config.in.x86
index 8f6a527fe0..327aff06b0 100644
--- a/arch/Config.in.x86
+++ b/arch/Config.in.x86
@@ -83,6 +83,15 @@ config BR2_x86_core2
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
+config BR2_x86_corei7
+ bool "corei7"
+ select BR2_X86_CPU_HAS_MMX
+ select BR2_X86_CPU_HAS_SSE
+ select BR2_X86_CPU_HAS_SSE2
+ select BR2_X86_CPU_HAS_SSE3
+ select BR2_X86_CPU_HAS_SSSE3
+ select BR2_X86_CPU_HAS_SSE4
+ select BR2_X86_CPU_HAS_SSE42
config BR2_x86_atom
bool "atom"
select BR2_X86_CPU_HAS_MMX
@@ -177,6 +186,7 @@ config BR2_ARCH
default "i686" if BR2_x86_prescott
default "i686" if BR2_x86_nocona && BR2_i386
default "i686" if BR2_x86_core2 && BR2_i386
+ default "i686" if BR2_x86_corei7 && BR2_i386
default "i686" if BR2_x86_atom && BR2_i386
default "i686" if BR2_x86_opteron && BR2_i386
default "i686" if BR2_x86_opteron_sse3 && BR2_i386
@@ -206,6 +216,7 @@ config BR2_GCC_TARGET_TUNE
default "prescott" if BR2_x86_prescott
default "nocona" if BR2_x86_nocona
default "core2" if BR2_x86_core2
+ default "corei7" if BR2_x86_corei7
default "atom" if BR2_x86_atom
default "k8" if BR2_x86_opteron
default "k8-sse3" if BR2_x86_opteron_sse3
@@ -236,6 +247,7 @@ config BR2_GCC_TARGET_ARCH
default "prescott" if BR2_x86_prescott
default "nocona" if BR2_x86_nocona
default "core2" if BR2_x86_core2
+ default "corei7" if BR2_x86_corei7
default "atom" if BR2_x86_atom
default "k8" if BR2_x86_opteron
default "k8-sse3" if BR2_x86_opteron_sse3