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authorGravatar Spenser Gilliland <spenser@gillilanding.com>2013-12-05 18:20:53 +0100
committerGravatar Peter Korsgaard <peter@korsgaard.com>2013-12-06 22:45:42 +0100
commit9e0fbe41e219619980f3d8b4a1d0278e84b885fa (patch)
tree003d434b1c9a6334ccd5a86de725efaa061a5de1 /package/gcc/Config.in.host
parentcdcb9690eaf977dd020a36fcb33b9c8ff04e2435 (diff)
downloadbuildroot-9e0fbe41e219619980f3d8b4a1d0278e84b885fa.tar.gz
buildroot-9e0fbe41e219619980f3d8b4a1d0278e84b885fa.tar.bz2
gcc: add microblaze internal toolchain
Signed-off-by: Spenser Gilliland <spenser@gillilanding.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
Diffstat (limited to 'package/gcc/Config.in.host')
-rw-r--r--package/gcc/Config.in.host23
1 files changed, 15 insertions, 8 deletions
diff --git a/package/gcc/Config.in.host b/package/gcc/Config.in.host
index 2f044573b8..186ba80cff 100644
--- a/package/gcc/Config.in.host
+++ b/package/gcc/Config.in.host
@@ -8,6 +8,7 @@ choice
default BR2_GCC_VERSION_4_4_X if BR2_sparc_sparchfleon || BR2_sparc_sparchfleonv8 || BR2_sparc_sparcsfleon || BR2_sparc_sparcsfleonv8
default BR2_GCC_VERSION_4_2_2_AVR32_2_1_5 if BR2_avr32
default BR2_GCC_VERSION_4_8_ARC if BR2_arc
+ default BR2_GCC_VERSION_4_9_MICROBLAZE if BR2_microblaze
default BR2_GCC_VERSION_4_5_X if BR2_bfin
default BR2_GCC_VERSION_4_7_X
help
@@ -18,12 +19,12 @@ choice
bool "gcc 4.2.2-avr32-2.1.5"
config BR2_GCC_VERSION_4_3_X
- depends on !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a5 && !BR2_cortex_a7 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc && !BR2_powerpc_464 && !BR2_powerpc_464fp && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4
+ depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a5 && !BR2_cortex_a7 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc && !BR2_powerpc_464 && !BR2_powerpc_464fp && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4
depends on !BR2_ARM_EABIHF
bool "gcc 4.3.x"
config BR2_GCC_VERSION_4_4_X
- depends on !BR2_arc && !BR2_avr32 && !BR2_cortex_a5 && !BR2_cortex_a7 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4
+ depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_cortex_a5 && !BR2_cortex_a7 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4
bool "gcc 4.4.x"
# ARM EABIhf support appeared in gcc 4.6
depends on !BR2_ARM_EABIHF
@@ -31,24 +32,24 @@ choice
depends on !BR2_ARM_FPU_VFPV4 && !BR2_ARM_FPU_VFPV4D16
config BR2_GCC_VERSION_4_5_X
- depends on !BR2_arc && !BR2_avr32 && !BR2_cortex_a7 && !BR2_cortex_a15 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_fa526 && !BR2_pj4
+ depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_cortex_a7 && !BR2_cortex_a15 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_fa526 && !BR2_pj4
select BR2_GCC_NEEDS_MPC
# ARM EABIhf support appeared in gcc 4.6
depends on !BR2_ARM_EABIHF
bool "gcc 4.5.x"
config BR2_GCC_VERSION_4_6_X
- depends on !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_cortex_a7 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_pj4
+ depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_cortex_a7 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_pj4
select BR2_GCC_NEEDS_MPC
bool "gcc 4.6.x"
config BR2_GCC_VERSION_4_7_X
- depends on !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_pj4
+ depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_pj4
select BR2_GCC_NEEDS_MPC
bool "gcc 4.7.x"
config BR2_GCC_VERSION_4_8_X
- depends on !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8
+ depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8
select BR2_GCC_NEEDS_MPC
bool "gcc 4.8.x"
@@ -57,8 +58,13 @@ choice
select BR2_GCC_NEEDS_MPC
bool "gcc 4.8-arc"
+ config BR2_GCC_VERSION_4_9_MICROBLAZE
+ depends on BR2_microblaze
+ select BR2_GCC_NEEDS_MPC
+ bool "gcc 4.9-microblaze"
+
config BR2_GCC_VERSION_SNAP
- depends on !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8
+ depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8
select BR2_GCC_NEEDS_MPC
bool "gcc snapshot"
endchoice
@@ -91,6 +97,7 @@ config BR2_GCC_VERSION
default "4.7.3" if BR2_GCC_VERSION_4_7_X
default "4.8.2" if BR2_GCC_VERSION_4_8_X
default "7466697995233cc3aab5b9427bf843e3c7fabd80" if BR2_GCC_VERSION_4_8_ARC
+ default "b93bb009e021aba64dd4b8cdb0bbc5a176c55543" if BR2_GCC_VERSION_4_9_MICROBLAZE
default BR2_GCC_SNAP_DATE if BR2_GCC_VERSION_SNAP
config BR2_EXTRA_GCC_CONFIG_OPTIONS
@@ -143,7 +150,7 @@ config BR2_GCC_ENABLE_TLS
config BR2_GCC_ENABLE_OPENMP
bool "Enable compiler OpenMP support"
- depends on !BR2_PTHREADS_NONE && !BR2_avr32 && !BR2_arc
+ depends on !BR2_PTHREADS_NONE && !BR2_avr32 && !BR2_arc && !BR2_microblaze
help
Enable OpenMP support for the compiler