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authorGravatar Thomas Petazzoni <thomas.petazzoni@free-electrons.com>2012-07-25 21:12:59 +0200
committerGravatar Thomas Petazzoni <thomas.petazzoni@free-electrons.com>2012-07-31 00:00:29 +0200
commit2ff012b3c70ea41cc6f241426320d1b168985f79 (patch)
tree495c86c2dfc0854afdcfd7c8732e878ea1dbf341 /toolchain
parent58a62766a1869c913845a649890855515aebb016 (diff)
downloadbuildroot-2ff012b3c70ea41cc6f241426320d1b168985f79.tar.gz
buildroot-2ff012b3c70ea41cc6f241426320d1b168985f79.tar.bz2
Simplify x86 target architecture variant handling
Instead of having two separate list of choices for select the target architecture variant for i386 and x86_64, with many CPU choices duplicated (because all modern x86 CPUs can be both used as i386 or x86_64), merge them into a single list. In the x86_64 case, all the x86 CPUs that do not support the 64 bits instruction set are hidden. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Diffstat (limited to 'toolchain')
-rw-r--r--toolchain/gcc/Config.in4
1 files changed, 2 insertions, 2 deletions
diff --git a/toolchain/gcc/Config.in b/toolchain/gcc/Config.in
index fa526bba3f..d08efbcfec 100644
--- a/toolchain/gcc/Config.in
+++ b/toolchain/gcc/Config.in
@@ -15,11 +15,11 @@ choice
bool "gcc 4.2.2-avr32-2.1.5"
config BR2_GCC_VERSION_4_3_X
- depends on !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_x86_atom && !BR2_x86_64_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc
+ depends on !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_x86_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc
bool "gcc 4.3.x"
config BR2_GCC_VERSION_4_4_X
- depends on !BR2_avr32 && !BR2_x86_atom && !BR2_x86_64_atom
+ depends on !BR2_avr32 && !BR2_x86_atom
bool "gcc 4.4.x"
config BR2_GCC_VERSION_4_5_X