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* targets: move target options to their own sub-menuGravatar Yann E. MORIN2013-09-051-0/+4
| | | | | | | | | | | | Currently, all target options lie in the top-level menu. This looks a bit clumsy, since all other options are neatly folded into their own sematic sub-menus each. Move the target option into their own sub-menu too. Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Acked-by: Thomas De Schampheleire <thomas.de.schampheleire@gmail.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* nios2: Add new architectureGravatar Ezequiel Garcia2013-09-022-0/+16
| | | | | | | | | | | | | | This commit adds very basic support to build for the Nios II architecture. Toolchain support is still missing and instead we need to use an external custom toolchain. Notice that this architecture had been previously removed in Buildroot 2010.05-rc1 release (as explained in the CHANGES file) and this commit adds it back. Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch/arm: add support for thumb(1) modeGravatar Gustavo Zacarias2013-07-181-3/+27
| | | | | | [Peter: also adjust BR2_GCC_TARGET_MODE] Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch/arm: update VFPv2 comment to mention ARMv5Gravatar Thomas Petazzoni2013-07-181-2/+3
| | | | | | | | | | Commit 6b3a0417c4 ('arch/arm: arm926 may have VFP') forgot to update the help text of the VFPv2 option to mention ARMv5. This commit fixes that. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch/arm: arm926 may have VFPGravatar Gustavo Zacarias2013-07-171-0/+1
| | | | | | | | | | The VFP9-S FPU (VFPv2) is optional for ARM926EJ-S, see: http://www.arm.com/products/processors/classic/arm9/arm926.php?tab=Specifications+ Real silicon: http://www.nxp.com/documents/data_sheet/LPC3180.pdf Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch: use tabs instead of spaces in Config.in filesGravatar Thomas Petazzoni2013-07-163-4/+4
| | | | | Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch/arm: add support for Thumb2Gravatar Thomas Petazzoni2013-07-162-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | Until now, we were using the default ARM instruction set, as used by the toolchain: the 32 bits ARM instruction set for the internal backend, and for external toolchain, whatever default was chosen when the toolchain was generated. This commit adds support for the Thumb2 instruction set. To do so, it: * provides a menuconfig choice between ARM and Thumb2. The choice is only shown when Thumb2 is supported, i.e on ARMv7-A CPUs. * passes the --with-mode={arm,thumb} option when building gcc in the internal backend. This tells the compiler which type of instructions it should generate. * passes the m{arm,thumb} option in the external toolchain wrapper. ARM and Thumb2 code can freely be mixed together, so the fact that the C library has been built either ARM or Thumb2 and that the rest of the code is built Thumb2 or ARM is not a problem. [Peter: fix empty BR2_GCC_TARGET_MODE check] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch: improve ARM floating point support and add support for EABIhfGravatar Thomas Petazzoni2013-07-161-14/+205
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit introduces the support for the EABIhf ABI, next to the existing support we have for EABI and OABI (even though OABI support is deprecated). EABIhf allows to improve performance of floating point workload by using floating point registers to transfer floating point arguments when calling functions, instead of using integer registers to do, as is done in the 'softfp' floating point model of EABI. In addition to this, this commit introduces a list of options for the floating point support: * Software floating point * VFP * VFPv3 * VFPv3-D16 * VFPv4 * VFPv4-D16 and it introduces some logic to make sure the options are only visible when it makes sense, depending on the ARM core being selected. This is however made complicated by the fact that certain VFP capabilities are mandatory on some cores, but optional on some other cores. The kconfig logic tries to achieve the following goals: * Hide options that are definitely not possible. * Use safe default values (i.e for Cortex-A5 and A7, the presence of the VFPv4 unit is optional, so we default on software floating point on these cores).. * Show the available possibilities, even if some of them are not necessarily working on a particular core (again, for the Cortex-A5 and A7 cores, there is no way of knowing whether the particular variant used by the user has VFPv4 or not, so we select software floating point by default, but still show VFP/VFPv3/VFPv4 options). It is worth noting that this commit doesn't add support for all possible -mfpu= values on ARM. We haven't added support for fpa, fpe2, fpe3, maverick (those four are only used on very old ARM cores), for vfpv3-fp16, vfpv3-d16-fp16, vfpv3xd, vfpv3xd-fp16, neon-fp16, vfpv4-sp-d16. They can be added quite easily if needed thanks to the new organization of the Config.in options. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch: Refactor BR2_SOFT_FLOAT into per-architecture optionsGravatar Thomas Petazzoni2013-07-164-0/+32
| | | | | | | | | | | | | | | | | | | | | | As we are going to introduced a more advanced support of floating point options for the ARM architecture, we need to adjust how the soft-float option is handled. We replace the current hidden option BR2_PREFER_SOFT_FLOAT option and the visible BR2_SOFT_FLOAT option by: * A global hidden BR2_SOFT_FLOAT option, defined in arch/Config.in, that tells whether the architecture-specific code is using software emulated floating point. This hidden option can be used throughout Buildroot to determine whether soft float is used or not. * Per-architecture visible BR2_<arch>_SOFT_FLOAT options, for the architecture for which it makes sense, which allows users to select soft float emulation when needed. This change will allow each architecture to have a different way of presenting its floating point capabilities. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch: introduce BR2_GCC_TARGET_{FPU, FLOAT_ABI}Gravatar Thomas Petazzoni2013-07-161-0/+12
| | | | | | | | | | | | | | | | Buildroot already has the BR2_GCC_TARGET_{TUNE,ARCH,ABI,CPU} hidden kconfig strings that allow per-architecture Config.in files to feed the appropriate values of --with-{tune,arch,abi-cpu} when building gcc, or the appropriate flags for the external toolchain wrapper. This commit has two additional options: BR2_GCC_TARGET_{FPU,FLOAT_ABI}, that allows to define the --with-{fpu,float} gcc configure options for the internal backend, or the -m{fpu,float-abi} options for the flags of the external toolchain wrapper. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch/arm: remove setting gcc's apcs-gnu ABI (aka OABI)Gravatar Yann E. MORIN2013-07-141-2/+1
| | | | | | | Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch/arm: remove OABI optionGravatar Yann E. MORIN2013-07-141-7/+0
| | | | | | | | | | | | | | | | | | | | OABI is more than legacy, it's dead. New developments should go with EABI, since it so much better. >From the Debian EABI page [0] : - floating point performance, with or without an FPU is very much faster - mixing soft and hardfloat code is possible - structure packing is not as painful as it used to be - a more efficient syscall convention - more compatibility with various tools [0] http://wiki.debian.org/ArmEabiPort [Thomas: keep the ABI choice, as we are going to introduce EABIhf later]. Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arm: update processor typesGravatar Kelvin Cheung2013-06-161-0/+5
| | | | | | | Update arm architecture variant: add the cortex A7. Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch: toolchain: Introduce binary format FLAT types.Gravatar Sonic Zhang2013-05-051-0/+26
| | | | | | | | | Just introduce the symbol and options in arch generic Config.in. Add FLAT types specific compiling flags into package makefile. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch: toolchain: Introduce target CPU revision.Gravatar Sonic Zhang2013-05-052-0/+11
| | | | | | | | | Adds the possibility to have a free-form CPU revision string and append it to the target CPU. Only Blackfin actually uses this option. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch: Add blackfin CPU choiceGravatar Sonic Zhang2013-05-051-0/+94
| | | | | | | | | This patch adds a Target CPU configuration option and uses it to select a -m option for gcc. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch: toolchain: Introduce binary formats BINFMT_*.Gravatar Sonic Zhang2013-05-052-11/+34
| | | | | | | | | Just introduce the symbol and options in arch generic Config.in. Append FLAT format link flags to external toolchain wrapper. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arc: Add option for ARC-specific download siteGravatar Mischa Jonker2013-05-041-0/+4
| | | | | | | | | | | | As ARC support is not yet in all upstream packages, a different location is required to download the packages from. This adds an option to specify a site for ARC-specific versions of packages such as binutils, gcc. When ARC support has been upstreamed for all packages, this option can be removed again. Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arc: Add ARC and ARC BE architectureGravatar Mischa Jonker2013-05-042-0/+32
| | | | | | | | Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs that can be used from deeply embedded to high performance host applications. Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* toolchain/arm: add support for Marvell PJ4Gravatar Gustavo Zacarias2013-04-291-0/+4
| | | | | Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* toolchain/arm: drop generic and old, add fa526/626, unify strongarmGravatar Gustavo Zacarias2013-04-111-20/+9
| | | | | | | | | | | | | | | | | * Add Faraday FA526/626 as suggested on bug #1291 Note however that these cores are v4 and NOT v4t. * Make the sa110 & sa1110 cores -> strongarm since they're the same. * Drop all of the ARM variants lower than v4 including generic, there's no point in supporting obsolete targets. * Fix uClibc USE_BX logic, it was always on, this would break the new FA526/626 support and broke StrongARM since it's a v4 core. Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* Mark AArch64 as a 64 bits architectureGravatar Thomas Petazzoni2013-03-181-0/+1
| | | | | Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch/arm: fix-up the ARM Kconfig warningGravatar Yann E. MORIN2013-02-071-3/+3
| | | | | | | | | | | | | | Kconfig does not accepts that a symbol that is part of a choice be affected a default value. Fix this by introducing a dummy EABI symbol, and make the real EABI symbol a prompt-less option that depends on !OABI. [Peter: drop arm dependency, rename to EABI_CHOICE] Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Cc: Peter Korsgaard <jacmet@uclibc.org> Cc: Arnout Vandecappelle <arnout@mind.be> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arm: deprecate OABIGravatar Arnout Vandecappelle (Essensium/Mind)2013-02-071-0/+5
| | | | | | | | The BR2_ARM_EABI config symbol is still kept in order to minimize the impact. Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch/Config.in.arm: Use armv6k for arm1136jf-s rev1Gravatar Benoît Thébaudeau2013-02-021-3/+10
| | | | | | | | | | | | According to the ARM1136JF-S and ARM1136J-S Revision r1p5 Technical Reference Manual, from release rev1 (r1pn), the ARM1136JF-S processor implements the ARMv6 instruction set with the ARMv6k additions. This patch differentiates the ARM1136JF-S revisions 0 and 1 in order to use either ARMv6j (e.g. on Freescale i.MX31) or ARMv6k (e.g. on Freescale i.MX35). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch/sparc: drop old SUN-specific variantsGravatar Gustavo Zacarias2013-01-021-31/+1
| | | | | | | | | | | | | | | | | | | | Drop the old Sun-specific variants used in old workstations (pre-1997) and other useless ones. The V7 ISA is a very old cpu only used in the first Sun workstations, the toolchain support is broken: the cpu doesn't do hardware div and it's not handled elsewhere. The sparclite is also a very old Fujitsu cpu only used in early 90s Sun machines (includes f930 & f934). The sparclet (tsc701) was a microcontroller-variant. The supersparc and hypersparc are just V8 variants also used in old Sun workstations/servers. Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch: fix BR2_ARCH for generic target variantGravatar Richard Braun2012-12-201-0/+1
| | | | | Signed-off-by: Richard Braun <rbraun@sceen.net> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch/Config.in.arm: Add BR2_ARM_CPU_HAS_NEON similar to how mmx/sse is ↵Gravatar Peter Korsgaard2012-12-131-0/+21
| | | | | | | | | handled on x86 NEON support is optional on A5/A9, so let the user choose if SoC has it / wants to use it. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arm: update processor typesGravatar Gustavo Zacarias2012-12-091-0/+8
| | | | | | | Update the arm processor types: add the cortex A5 & A15 variants. Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* powerpc: update processor typesGravatar Gustavo Zacarias2012-12-091-3/+12
| | | | | | | | | Update the powerpc processor types. Remove the 801, it's the original IBM experimental implementation. Add the 464, 464fp, 476 and 476fp cores. Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* xtensa: use uppercase for configurations and modified overlay structureGravatar Chris Zankel2012-11-211-11/+15
| | | | | | | | | | | Except for architecture and processor names, buildroot uses capitalized configuration names, so change the macro names for xtensa to follow that standard. Change the overlay file to have a subdirectory for each component (gdb, binutils, gcc, etc.) to make it more future-prove. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch: Config.in string configuration options must be quotedGravatar Thomas Petazzoni2012-11-156-171/+171
| | | | | | | | | Suggested by Yann E. Morin. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reported-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* xtensa: support configurable processor configurationsGravatar Chris Zankel2012-11-151-0/+31
| | | | | | | | | | | | | | | | | | | Xtensa is a configurable processor architecture, which allows to define additional instructions and registers. The required variant specific information for the toolchain is delivered in an 'overlay' file, which needs to be 'untarred' to the corresponding directories after the source is installed and patched. This patch provides support for binutils, gcc, and gdb with a very limited changes to the build scripts. These additions are only executed for the Xtensa architecture and have no effect on other architectures. [Thomas: rebased on top of the 'arch: improve definition of gcc mtune, mcpu, etc.' patch, and changed 'Target ABI' to 'Target Architecture Variant']. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* xtensa: add support for the Xtensa architectureGravatar Chris Zankel2012-11-152-0/+13
| | | | | | | | | | | | | The Xtensa architecture had been removed because it required special handling and depended on additional directories and files that became obsolete over time. This change is more aligned to other architectures. [Thomas: rebased on top of the "arch: improve definition of gcc mtune, mcpu, etc." patch]. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* arch: improve definition of gcc mtune, mcpu, etc.Gravatar Thomas Petazzoni2012-11-1513-249/+361
| | | | | | | | | | | | | | | | | | As suggested by Yann E. Morin, there is a better way than our current big Config.in.common to define the gcc mtune, mcpu, march, etc. values. We can split the setting of those values in each architecture file, which makes a lot more sense. Therefore, the Config.in file now creates empty kconfig variables BR2_ARCH, BR2_ENDIAN, BR2_GCC_TARGET_TUNE, BR2_GCC_TARGET_ARCH, BR2_GCC_TARGET_ABI and BR2_GCC_TARGET_CPU. The values of those variables are set by the individual Config.in.<arch> files. This is possible because such files are now only conditionally included depending on the top-level architecture that has been selected. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* Split target/Config.in.arch into multiple Config.in.* in arch/Gravatar Thomas Petazzoni2012-11-049-0/+822
target/Config.in.arch had become too long, and we want to remove the target/ directory. So let's move it to arch/ and split it this way: * An initial Config.in that lists the top-level architecture, and sources the arch-specific Config.in.<arch> files, as well as Config.in.common (see below) * One Config.in.<arch> per architecture, listing the CPU families, ABI choices, etc. * One Config.in.common that defines the gcc mtune, march, mcpu values and other hidden options. [Peter: space->tab fix, mipsel64 little endian, mips3 as noted by Arnout] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>