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authorGravatar Aurelien Jacquiot <a-jacquiot@ti.com>2011-02-23 13:04:59 +0100
committerGravatar Bernd Schmidt <bernds@codesourcery.com>2011-03-05 18:10:15 +0100
commit46d6a24872b7fa2717f8f71b5e0598a14d38e1f6 (patch)
tree886cf5a54ef7fd260acf2dd7d1722acea1c62186 /include
parent817f685f4c65ed1af6eef79749b1f158eedd5bfc (diff)
downloaduClibc-46d6a24872b7fa2717f8f71b5e0598a14d38e1f6.tar.gz
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The C6X port
This adds support for the TI C6X family of processors. Signed-off-by: Mark Salter <msalter@redhat.com> Signed-off-by: Aurelien Jacquiot <a-jacquiot@ti.com> Signed-off-by: Bernd Schmidt <bernds@codesourcery.com>
Diffstat (limited to 'include')
-rw-r--r--include/elf.h45
1 files changed, 45 insertions, 0 deletions
diff --git a/include/elf.h b/include/elf.h
index b86aa52be..d71691eb3 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -268,6 +268,7 @@ typedef struct
#define EM_ALTERA_NIOS2 113 /* Altera Nios II soft-core processor */
#define EM_CRX 114 /* National Semiconductor CRX */
#define EM_NUM 95
+#define EM_TI_C6000 140
/* If it is necessary to assign new unofficial EM_* values, please pick large
random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
@@ -3063,6 +3064,50 @@ typedef Elf32_Addr Elf32_Conflict;
/* Keep this the last entry. */
#define R_XTENSA_NUM 50
+/* C6X specific relocs */
+#define R_C6000_NONE 0
+#define R_C6000_ABS32 1
+#define R_C6000_ABS16 2
+#define R_C6000_ABS8 3
+#define R_C6000_PCR_S21 4
+#define R_C6000_PCR_S12 5
+#define R_C6000_PCR_S10 6
+#define R_C6000_PCR_S7 7
+#define R_C6000_ABS_S16 8
+#define R_C6000_ABS_L16 9
+#define R_C6000_ABS_H16 10
+#define R_C6000_SBR_U15_B 11
+#define R_C6000_SBR_U15_H 12
+#define R_C6000_SBR_U15_W 13
+#define R_C6000_SBR_S16 14
+#define R_C6000_SBR_L16_B 15
+#define R_C6000_SBR_L16_H 16
+#define R_C6000_SBR_L16_W 17
+#define R_C6000_SBR_H16_B 18
+#define R_C6000_SBR_H16_H 19
+#define R_C6000_SBR_H16_W 20
+#define R_C6000_SBR_GOT_U15_W 21
+#define R_C6000_SBR_GOT_L16_W 22
+#define R_C6000_SBR_GOT_H16_W 23
+#define R_C6000_DSBT_INDEX 24
+#define R_C6000_PREL31 25
+#define R_C6000_COPY 26
+#define R_C6000_JUMP_SLOT 27
+#define R_C6000_SBR_GOT32 28
+#define R_C6000_PCR_H16 29
+#define R_C6000_PCR_L16 30
+#define R_C6000_ALIGN 253
+#define R_C6000_FPHEAD 254
+#define R_C6000_NOCMP 255
+
+/* C6x specific values for the Dyn d_tag field. */
+#define DT_C6000_DSBT_BASE (DT_LOPROC + 0)
+#define DT_C6000_DSBT_SIZE (DT_LOPROC + 1)
+#define DT_C6000_PREEMPTMAP (DT_LOPROC + 2)
+#define DT_C6000_DSBT_INDEX (DT_LOPROC + 3)
+
+#define DT_C6000_NUM 4
+
#ifdef __cplusplus
}
#endif